10 Pin Out Address

This topic goes over how 8086 creates addresses and how data transfers occurs

Intro¶

8086 can be divided mainly into

1. Bus Interface Unit
2. Execution Unit

Externals¶

ROM - Read-Only Memory

contains the BIOS (Basic Input/Output System)

RAM - Random Access Memory is faster and hence, applications get loaded here during runtime

Permanent Memory is non-volatile

IO- Input/Output Devices

Buses¶

All signals depend on the clock. So faster the frequency of the clock, faster the operations.

Address Buses¶

They are multiplexed with data lines and with selection lines. To reduce area required.

Multiplexing happens with inputs that won’t be used simultaneously.

Pin Diagram¶

40 pins

Dual Inline Package IC

VCC¶

\(5v \pm 10 \%\)

GND¶

2 grounds

Clk¶

One cycle of this clock is called as T state.

The time between 2 rising/falling edges is called as a time period.

Reset¶

Used to initialize the processor. The processor will repeat all given instructions. Any data inside registers will be lost, and flags will be reset.

CS FFFFh

IP 0000h

This signal has to high for atleast 4 clk signals.

\(MN/ \overline{MX}\)¶

Minimum/Maximum

These 2 are different modes of operations.

ALE¶

Address Latch Enable

Whenever there is address, this is set as high. Else, it is data.

This is sent to Gate signal.

\(\overline{BHE}/S7\)¶

Bus High Enable

Enables the most significant data lines (D8 - D15), only when required

S7 is always high

Modes¶

Octal Latch¶

8 bit latch

used for de -multiplexing address and data

it is used to ensure that address does not get affected, while operations don’t get affected.

we are using LS273

G¶

Gate Signal controls whether or not input to the latch get reflected to the output.

As soon as the address gets passed through, the signal is turned low.

get its value from the ALE

When \(G\) is high, address is sent out. Else, data is sent out.

\(\overline{OE}\)¶

Output Enabled Active Low

Grounded by default

Don’t know¶

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