04 Data Link Layer

It is a combination of hardware, software, and firmware (software for hardware)

It is implemented in NIC and attaches into host’s system buses

Sublayers¶

The data link may be further divided into sublayers, which is explained in detail in Ethernet

Flow Control¶

Handles mismatch b/w sender’s and receiver’s speed

Error Types¶

Error Control¶

Redundancy¶

Redundant bits added to data to detect & correct errors

flowchart LR

subgraph s[Sender's Encoder]
m1[Message] -->
Generator -->
a[Message &<br/>Redundancy]
end

subgraph r[Receiver's Decoder]
d[Received<br/>Data] -->
c[Checker] -->
|Accept| m2[Message]
end

a -->
|Unreliable<br/>Transmission| d

c --> |Discard| Lost

Coding¶

Process of adding redundancy for error detection/correction

Error-detecting code can detect 
only types of errors for which it is designed; other types of errors may remain undetected. There is no way to detect every possible error

flowchart TB

d1["Dataword<br/>a3 a2 a1 a0<br/><br/>(k bits)"] -->
c1 & g["Generator<br/>(r bits)"]

g -->
c1["Codeword<br/>a3 a2 a1 a0 <span style='color:red'>p0</span><br/><br/>(n bits)"]

Code Rate¶

Error Detection Methods¶

If syndrome = 0 at the receiver, there is no error

	Simple parity check	Horizontal & Vertical Parity check	CRC (Cyclic Redundancy Check)	Checksum
	Use an odd/even parity bit	Use parity bit vertically and horizontally	Add \(r\) zeros to right of dividend, where \(r=\)no of redundant bits = length of divisor - 1 Long division using XOR	(used in network layer) Find sum of digits If overflow, perform padding Take 1s complement
Errors detectable	\(\{1, 3, \dots, 2n+1 \}\) (odd no of errors)	\(\{1, 2, 3, 5, 6, 7, \dots \} \implies R - \{4n\}\)	All	All
Can correct error?	❌ (error can be in any position including parity bit itself)

Simple Parity¶

Mac Layer Throughput¶

Number of bits sent by MAC (Data Link) layer in given period of time

Control Frame¶

Frames that only contain headers/trailers, and no payload

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